Phase shift mask (PSM) lithography is a known lithography technique for forming features on an integrated circuit. Photolithography requires sufficient resolution, contrast and depth of focus to form feature details having a minimum feature resolution. PSM requires etching of an underlying quartz mask plate and/or specifically deposited dielectric films to a depth that results in phase shifting of the light by a predetermined amount, typically one hundred eighty degrees.
To achieve lower cost, a technique known as chromeless phase lithography (CPL) has been proposed in the literature. CPL requires fewer electron beam lithography steps, thus reducing processing costs. Quartz etching for PSM manufacturing has typically been done using fluorocarbon oxygen plasma sources. The current processes that have been developed for PSM when applied to CPL have several shortcomings. These shortcomings include a fast quartz layer etch rate that makes it difficult to precisely control etching depth in the quartz layer. An incorrect depth in the quartz layer will result in incorrect shifting and ultimately reduce the feature contrast during subsequent semiconductor wafer fabrication. A second shortcoming with PSM based quartz etching applied to CPL includes non-uniformity of etching. In other words, across the mask etch depths and profiles vary. This variation also negatively affects feature contrast. A third shortcoming with PSM based quartz etching applied to CPL includes the fact that trench sidewalls become more non-vertical and slope angles vary more. A fourth shortcoming with PSM based quartz etching applied to CPL includes the fact that a chrome/chrome oxynitride stack is exposed and will be sputtered and therefore roughened. The sputtering also creates a second undesired effect. Due to sputtering, feature edges of a CPL mask become significantly rounded. Significant rounding results in a loss of lithography contrast.
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